TDG-08981-001_v1.0 | October 2018
Thermal Design Guide
JETSON AGX XAVIER
Jetson AGX Xavier TDG-08981-001_v1.0 | ii
DOCUMENT CHANGE HISTORY
TDG-08981-001_v1.0
Version
Date
Description of Change
0.9 June 1, 2018 Initial Release (Preliminary Information)
0.91 August 15, 2018
• Updated Table 2-1, Table 3-1, and Table 4-1
• Added Figure 4-1
1.0 October 1, 2018
•
No longer preliminary
• Updated Table 2-1 and Table 4-1
• Updated Figure 4-1 and Figure 5-1
Jetson AGX Xavier TDG-08981-001_v1.0 | iii
TABLE OF CONTENTS
Chapter 1. Introduction ........................................................................ 1
1.1 Customer Requirements .................................................................. 1
1.2 Related Documents ........................................................................ 2
1.3 Definitions................................................................................... 2
1.3.1 Total Module Power ................................................................ 2
1.3.2 Thermal Transfer Plate ............................................................ 2
1.3.3 Xavier SoC Temperature ........................................................... 4
Chapter 2. Specifications ....................................................................... 5
2.1 Thermal Specifications .................................................................... 5
Chapter 3. Design Guidance ................................................................... 7
3.1 Thermal Information ...................................................................... 7
3.1.1 Jetson AGX Xavier Thermal Performance ....................................... 8
3.1.2 Jetson AGX Xavier Thermal Design Details .................................... 10
3.1.3 Customer Thermal Solution ...................................................... 12
3.1.4 Temperature Cycling .............................................................. 12
3.2 Mechanical Information .................................................................. 12
3.2.1 Assembly Guidelines .............................................................. 14
Chapter 4. Software Thermal Management ............................................... 16
4.1 Temperature Monitoring ................................................................. 16
4.2 Fan Control ................................................................................ 16
4.3 Xavier SoC Recommended Operating Temperature Limit .......................... 18
4.4 Xavier SoC HARdware Thermal Throttling ............................................ 18
4.5 Xavier SoC Thermal Trip Temperature ................................................ 19
Chapter 5. Optimizing Jetson AGX Xavier for Power and Performance ............. 20
5.1 Power Supply .............................................................................. 20
5.2 Power Measurment Hardware ........................................................... 20
5.3 Power Measurement Software Usage .................................................. 21
Jetson AGX Xavier TDG-08981-001_v1.0 | iv
LIST OF FIGURES
Figure 1-1. Jetson AGX Xavier – Topside ISO View ............................................. 3
Figure 1-2. Jetson AGX Xavier – Backside ISO View ............................................ 3
Figure 1-3. Jetson AGX Xavier Design – Exploded View ........................................ 4
Figure 3-1. Thermal Resistance Network ........................................................ 8
Figure 3-2. Location of TTP Thermocouple ..................................................... 10
Figure 3-3. Thermal Stack Up Schematic ....................................................... 11
Figure 3-4. Jetson AGX Xavier Top View ........................................................ 13
Figure 3-5. Jetson AGX Xavier Bottom View ................................................... 13
Figure 3-6. Jetson AGX Xavier Side View ....................................................... 14
Figure 3-7. Jetson AGX Xavier System Assembly Example ................................... 14
Figure 3-8. Mounting Screw Sequence .......................................................... 15
Figure 4-1. Fan Control Behavior ................................................................. 17
Figure 5-1. Jetson AGX Xavier Module Power Rails ........................................... 21
LIST OF TABLES
Table 2-1. Jetson AGX Xavier Thermal Specifications ........................................ 6
Table 3-1. Jetson AGX Xavier Thermal Performance.......................................... 9
Table 4-1. Jetson AGX Xavier Default Fan ..................................................... 17
Table 5-1. Address and Channel Allocation .................................................... 22
Jetson AGX Xavier TDG-08981-001_v1.0| 1
Chapter 1.
INTRODUCTION
This document is the thermal design guide (TDG) for the NVIDIA
®
Jetson
™
AGX
Xavier
™
.
The purpose of this thermal design guide is to provide the system-level thermal,
mechanical and qualification requirements for the Jetson AGX Xavier.
1.1 CUSTOMER REQUIREMENTS
The customer requirements are as follows:
Customers are responsible for reading and understanding this entire thermal design
guide.
Customers are responsible for implementing a thermal solution that maintains the
NVIDIA
Xavier SoC and TTP temperatures below the specified temperatures in Table
2-1 under the maximum thermal load and system conditions for their use case.
Customers are responsible for designing a system that delivers sufficient power to the
Jetson AGX Xavier to sustain the maximum thermal load for their use case.
Customers are responsible for qualification of the Jetson AGX Xavier in their system
and are responsible for any issues related to failure to qualify the product properly.
The thermal transfer plate (TTP) is not designed to be removed by the customer, as
the thermal interface material (TIM) cannot be reused. The screws holding the TTP
together are marked with tamper evident ink. Removal of the TTP is done solely at
the customer’s risk.
Introduction
Jetson AGX Xavier TDG-08981-001_v1.0 | 2
1.2 RELATED DOCUMENTS
The following types of files are associated resources for Jetson AGX Xavier.
Jetson AGX Xavier Module 3D CAD STEP Model
A 3D mechanical model of the board is available in the universal .stp file format. The
model is provided to enable system level mechanical fit checks, mounting and wiring
planning.
Jetson AGX Xavier Module Data Sheet
The mechanical drawing of the Jetson AGX Xavier module is included in the data
sheet.
1.3 DEFINITIONS
This section describes terminology that will be referenced throughout this thermal
design guide.
1.3.1 Total Module Power
The total module power (TMP) represents the average board power dissipation while
the system is running the target workload under the worst-case conditions in steady
state. System designs must be capable of providing sufficient cooling for the Jetson AGX
Xavier when operating at the TMP level.
1.3.1.1 TMP Conditions
TMP conditions for this design are defined under the following operating conditions:
Worst-case Xavier SoC temperature conditions
Maximum power level for the product configuration
● The TMP power level is based on the target workload
Steady state average power
1.3.2 Thermal Transfer Plate
The Jetson AGX Xavier is provided with a thermal transfer plate (TTP) to simplify
integration with a system-level thermal solution. The Jetson AGX Xavier is shown in
Figure 1-1 (topside view) and Figure 1-2 (backside view).
Introduction
Jetson AGX Xavier TDG-08981-001_v1.0 | 3
Figure 1-1. Jetson AGX Xavier – Topside ISO View
Figure 1-2. Jetson AGX Xavier – Backside ISO View
The thermal solution of the customer’s system design should attach to the top surface of
the TTP. The thermal solution can be mounted using the main module mounting holes.
More details are provided in Section 3.2.
An exploded view of the Jetson AGX Xavier assembly is shown in Figure 1-3. The PCB is
completely covered by the TTP. The TTP design mechanically isolates the Jetson AGX
Xavier board and components from external mechanical forces, standardizes the thermal
and mechanical interface, and allows for modular system design.
Introduction
Jetson AGX Xavier TDG-08981-001_v1.0 | 4
Figure 1-3. Jetson AGX Xavier Design – Exploded View
1.3.3 Xavier SoC Temperature
The Xavier SoC junction temperature (Tj) represents the Xavier SoC die temperature
read from the highest of the internal temperature sensors. The on-die thermal sensors
are used for high-temperature T
j management and many other temperature-dependent
functions. Details regarding the software thermal mechanisms are described in Chapter
4.
Jetson AGX Xavier TDG-08981-001_v1.0| 5
Chapter 2.
SPECIFICATIONS
2.1 THERMAL SPECIFICATIONS
On Xavier SoC there are multiple on-die temperature sensors that are placed close to
dominant hotspots to measure temperature and engage thermal protection mechanisms.
Chapter 4 contains the details related to these sensors and their thermal protection
mechanisms. The specifications in Table 2-1 must be followed to maintain the
performance and reliability of the Jetson AGX Xavier module.
Specifications
Jetson AGX Xavier TDG-08981-001_v1.0 | 6
Table 2-1. Jetson AGX Xavier Thermal Specifications
Parameter
30 W Mode
4
MaxN Mode
5
Units
Maximum TTP operating temperature
1
80.0 80.0
°C
Recommended Xavier SoC operating
temperature limit
2
T.cpu = 90.0 T.cpu = 86.0 °C
T.gpu = 92.5 T.gpu = 88.0 °C
T.aux = 89.0 T.aux = 82.0 °C
Xavier SoC maximum operating
temperature limit
3
T.cpu = 95.5 T.cpu = 91.5 °C
T.gpu = 98.0 T.gpu = 93.5 °C
T.aux = 94.5 T.aux = 87.5 °C
Notes:
1
The temperature of the TTP must always be kept within this 80 °C limit to maintain the specified
performance and reliability. The measurement locations is provided in Figure 3-2
2
These are the temperature thresholds below which the product will operate at the specified clock
speeds. Software will apply clock speed reductions once any of these temperature sensors exceed
these the specified thresholds. For most workloads, either the CPU temperature or the GPU
temperature will reach the temperature limit before the other sensors. It is less common for the AUX
sensor to reach its temperature limit. Note that power fluctuations that induce T
j
fluctuations above
these thresholds will cause temporary clock reductions. See Section 4.3 for details.
3
The Xavier SoC will reset the Jetson AGX Xavier module once any of these software-imposed
temperature limits are reached to maintain the reliability of the Xavier SoC. See Section 4.5 for
details.
4
The Power Management for Jetson AGX Xavier document describes multiple power modes: a 10 W, a
15 W, and several 30 W modes. The same temperature settings apply to all of these power modes that
are within the 30 W module power budget.
5
The MaxN power mode allows for higher operating power levels. These higher power modes require
lower temperature limits to maintain the reliability of Jetson AGX Xavier.
Jetson AGX Xavier TDG-08981-001_v1.0| 7
Chapter 3.
DESIGN GUIDANCE
This chapter provides design guidance in order to meet the Jetson AGX Xavier
specifications.
3.1 THERMAL INFORMATION
The design goal for system thermal management is to keep the TTP temperature and the
Xavier SoC temperature below the limits specified in Section 2.1. The TTP temperature
limit maintains the component temperatures on Jetson AGX Xavier within their
temperature specifications.
Typical workloads that consume less than 30 W module power are likely to operate
below the Tj temperature limits, so long as the TTP temperature is within the
specification. For unbalanced workloads or higher power workloads, more analysis is
needed to evaluate the thermal design. This is described in the following section.
Design Guidance
Jetson AGX Xavier TDG-08981-001_v1.0 | 8
3.1.1 Jetson AGX Xavier Thermal Performance
The Jetson AGX Xavier module is designed to have a system level thermal solution
attached to the TTP to dissipate the TMP thermal load into the ambient environment.
This can be represented with a thermal resistance network where thermal resistance is
calculated based on the equation:
=
Where:
The thermal resistance between Point 1 and Point 2
The temperature at Point n
The heat load (for example, dissipated power) transferred between Point
1 and Point 2
A simple example of a thermal resistance network is shown in Figure 3-1, where θ
jp
represents the thermal resistance from T
j to the TTP and θpa represents the thermal
resistance of the system thermal solution. The thermal resistance of the system thermal
solution may include multiple components including, but not limited to, thermal
interface material, heat spreaders, and heat sinks.
Figure 3-1. Thermal Resistance Network
Jetson AGX Xavier enables a wide variety of applications that may exercise different
components on the module. The variation between applications will cause variation in
heat loads on the different components on the Jetson AGX Xavier and hotspots in
different logical partitions of the Xavier SoC. While Jetson AGX Xavier is designed to
spread the heat and make the thermal performance as consistent as possible, different
applications have different levels of thermal performance. The more evenly the module
T.j
T.ttp
T.amb
θ
pa
TMP
θ
jp
Design Guidance
Jetson AGX Xavier TDG-08981-001_v1.0 | 9
power is distributed across the Jetson AGX Xavier the better the thermal performance
will be. Typical thermal performance of different workloads are listed in Table 3-1 for
reference.
Table 3-1. Jetson AGX Xavier Thermal Performance
Balanced Workload
1
Unbalanced Workload
2
θ
jp
0.35°C/W 0.65 °C/W
θ
jb
5.5 °C/W
Notes:
1
A balanced workload is well distributed across the CPU, GPU, DLA, PVA, and DRAM. This is expected to
be representative of most use cases. The Power Management for Jetson AGX Xavier document
describes multiple power modes that widely distribute the power across the different partitions of the
Xavier SoC.
2
In an unbalanced workload, the power is concentrated on a small area of the Xavier SoC. This is not
representative of most use cases. An example is a workload that is only running on the CPU partition.
3
The θ
jb
value is provided for simulation of the Jetson AGX Xavier module as a 2-resistor model in
commercial CFD packages.
The thermal resistance of the module (θ
jp) and heat sink (θpa) sum together for the
overall thermal resistance from the Xavier SoC to ambient. The required heat sink
thermal performance can be determined based on the ambient temperature conditions,
use case, and TMP level required by the customer. Consider the following example:
. = 50°
. = 86° (Allowing headroom to account for Tj fluctuations resulting from
power fluctuations)
= 0.35
°
(Assuming a balanced workload)
= 30
First, check the heat sink thermal performance requirement for the above conditions.
=
+
=
=
= 1.2
°
0.35
°
= 0.85
°
So, the heat sink’s thermal performance (
) must be better than 0.85 °C/W. Next, check
that the TTP temperature will be below the 80 °C specification.
=
=
+
= 0.85
°
30 + 50° = 75.5°
So a 0.85 °C/W or better thermal solution will be sufficient to meet the Tj and TTP
temperature specifications.
Design Guidance
Jetson AGX Xavier TDG-08981-001_v1.0 | 10
3.1.2 Jetson AGX Xavier Thermal Design Details
The Jetson AGX Xavier product is designed for integration with a product-level thermal
solution which could be a passive heat sink, an active heat sink, a cold plate, a chassis
mount, etc. The thermal solution must attach to the top surface of the TTP.
The 75 x 73 mm area, as shown in Figure 3-2, is the key contact area for efficient cooling
performance. Full contact with the entire top surface of the TTP is suggested for
maximum cooling.
The TTP has a maximum operating temperature specified in Table 2-1. If the Jetson AGX
Xavier temperature is kept below this limit, then all other critical components on the
PCB will be within their temperature limits as well. The TTP temperature is to be
measured during qualification testing at the location indicated by a cross (+) in Figure
3-2
Figure 3-2. Location of TTP Thermocouple
Design Guidance
Jetson AGX Xavier TDG-08981-001_v1.0 | 11
In the Z-direction, the cold plate thermocouples should be located on the surface of the
TTP as shown in Figure 3-2, indicated by Location 2 and Location 3. During thermal
qualification, these are the only temperatures that need to be monitored with a
thermocouple. The Xavier SoC temperature (Location 1) is monitored via software. Note
the following for Figure 3-3:
Jetson AGX Xavier Contents
● Thermal transfer plate and backside stiffener - The thermal transfer plate has an
internal heat spreader plate connected to the Xavier SoC in order to reduce the
thermal performance variation between workloads.
● PCB with components.
● TIM - Henkel GF3500S35. TIM is applied on all components necessary to maintain
the component temperatures within their specified limits.
Customer Requirements (The customer is responsible for the following items)
● HS_TIM - The customer is responsible for providing the thermal interface material
between the TTP and the thermal solution. For best thermal performance, the TIM
should provide low thermal impedance within the mechanical, reliability, and cost
constraints of the customer's product.
● Thermal Solution - A thermal solution capable of cooling the appropriate amount of
TMP for the target workload.
● Maximum TTP Temperature - To ensure that the maximum Xavier SoC operating
temperature is less than the value specified in Table 2-1 (shown as Location 1 in
Figure 3-3), and the maximum TTP temperature must not exceed the value specified
in Table 2-1 (shown as Location 2 in Figure 3-3).
SoC
Figure 3-3. Thermal Stack Up Schematic
Design Guidance
Jetson AGX Xavier TDG-08981-001_v1.0 | 12
3.1.3 Customer Thermal Solution
The customer’s thermal solution is the mechanical element that interfaces to the NVIDIA
TTP and provides cooling. The thermal solution must attach to the top surface of the
TTP but a variety of configurations are possible depending on the customer’s chassis
design. In all cases however, the following recommendation are applicable:
Good contact of the thermal solution to the TTP is critical for maximizing the thermal
performance of the Jetson AGX Xavier. The Xavier SoC is located directly under the
TTP and consumes the majority of the TMP. Thus, using a TIM that provides good
thermal contact between the thermal solution and the TTP is crucial.
NVIDIA thermal testing has demonstrated that as long as the TTP temperature does
not exceed the maximum specified temperature, then the rest of the components will
be within their specified operating temperature range.
The customer thermal solution should include adequate margin to account for
module to module variations.
3.1.4 Temperature Cycling
Long-term reliability of all solder interconnects is negatively impacted by temperature
cycling. It is the customer’s responsibility to minimize the component’s exposure to
temperature cycling and to not exceed that which the component is qualified. NVIDIA’s
graphics and core logic components are qualified to JEDEC standard JESD47.
Note: NVIDIA recommends that customers refer to JESD94.01 (Application Specific
Qualification Using Knowledge Based Test Methodology) for more information.
3.2 MECHANICAL INFORMATION
Jetson AGX Xavier partners should refer to the CAD model provided in Section 1.2 for
the exact product dimensions to determine how to interface the TTP with their thermal
solution and ensure mechanical compatibility in their system. The top view, bottom
view, and side views are shown in Figure 3-4, Figure 3-5, and Figure 3-6, respectively.
Design Guidance
Jetson AGX Xavier TDG-08981-001_v1.0 | 13
Figure 3-4. Jetson AGX Xavier Top View
Figure 3-5. Jetson AGX Xavier Bottom View
Design Guidance
Jetson AGX Xavier TDG-08981-001_v1.0 | 14
Figure 3-6. Jetson AGX Xavier Side View
3.2.1 Assembly Guidelines
The Jetson AGX Xavier and TTP are provided as a complete unit. Orientation of the unit
is to be aligned with the board-to-board connector and secured to the baseboard as
shown in Figure 3-7. Care should be taken to make sure that the mounting screws are
not inserted at an angle and that they go through the thermal solution, the TTP, and the
backside stiffener. The mounting screws must thread into standoffs that contact the
backside stiffener to support the module. Note that the connector alone cannot be used
to support the module.
Figure 3-7. Jetson AGX Xavier System Assembly Example
The following are suggested assembly guidelines.
1. Install the Jetson AGX Xavier by the carefully aligning the module connector with
the base board connector.
2. Insert the module connector into the base board connector.
3. Install each mounting M3 screw into the heat sink.
Design Guidance
Jetson AGX Xavier TDG-08981-001_v1.0 | 15
a) If the TIM has been pre-applied to the heat sink, make sure to remove the
protective cap covering the TIM.
b) If the TIM was not pre-applied to the heat sink, apply the TIM to the center of the
module as shown in Figure 3-2.
4. Align the heat sink with the module.
5. Each mounting M3 screw should be attached loosely in the sequence shown in
Figure 3-8. The tightening sequence should be followed for two cycles. On the last
tightening sequence, the screws should be fully torqued.
Figure 3-8. Mounting Screw Sequence
Jetson AGX Xavier TDG-08981-001_v1.0| 16
Chapter 4.
SOFTWARE THERMAL MANAGEMENT
4.1 TEMPERATURE MONITORING
The Xavier SoC junction temperature can be directly read from sysfs nodes, as shown in
the following example. Note that the name of each temperature zone is noted in the type
node and that the temperature values are reported in units of m °C.
# cat /sys/devices/virtual/thermal/thermal_zone0/type
bcpu-therm
# cat /sys/devices/virtual/thermal/thermal_zone0/temp
35000
4.2 FAN CONTROL
The Jetson AGX Xavier can be configured to control a system fan. Pulse width
modulation (PWM) output and tachometer input are supported. Jetson AGX Xavier has
configurable fan control of step-based speed control with hysteresis, example as shown
in Figure 4-1.
Software Thermal Management
Jetson AGX Xavier TDG-08981-001_v1.0 | 17
Figure 4-1. Fan Control Behavior
The default fan table is listed in Table 4-1. Note that PWM is configured on a 2^8 scale,
with 255 being equivalent to 100% duty cycle.
Table 4-1. Jetson AGX Xavier Default Fan
“thermal-fan-est” Thermal Zone Temperature
1
(°C)
PWM
Hysteresis
2
(°C)
50
77
18
63 120 8
72 160 8
81 255 8
Notes:
1
Fan speed is controlled by the thermal-fan-est sensor, which reports the weighted average of the CPU,
GPU, and AUX sensors at a 3:3:4 ratio.
2
The hysteresis set for each trip point must be greater than the previous trip point.
For example, 81 °C – 8 °C = 73 °C, which is greater than the 160 PWM trip point at 72 °C.
Software Thermal Management
Jetson AGX Xavier TDG-08981-001_v1.0 | 18
4.3 XAVIER SoC RECOMMENDED OPERATING
TEMPERATURE LIMIT
The recommended operating temperature limit is the threshold at which the module
will operate without performance reduction. These temperatures are listed in Table 2-1
and cannot be adjusted. The customer’s tolerance for performance reduction should
determine the amount of Tj operating headroom in the thermal solution design to
accommodate the temperature sensor uncertainty of ±4°C.
Software thermal management operates as follows:
When the measured temperature is at or below the operating temperature threshold,
software T
j thermal management is not engaged and the system is free to vary the
system frequencies and voltages by the DVFS algorithm.
When the measured temperature reaches the thermal management threshold, the
internal thermal sensors generate an interrupt to software. At this point the software
thermal management algorithm engages and begins periodically performing the
following operations:
● Polling temperature.
● Running a thermal management control algorithm to calculate the throttle degree,
indicating the amount of throttling to apply during the next time period.
● Throttle the system to the level of throttling indicated by the throttling control
algorithm. Throttling is applied through limits on the clock frequency of high-
power units such as the CPU and graphics processing unit (GPU). Higher throttling
degree results in lower frequency limits. DVFS policies operate within these
frequency limits.
Software thermal management remains in operation until the Xavier SoC temperature
has returned to a value below the throttling threshold and throttling degree has
returned to zero.
Note: Power fluctuations that induce T
j
fluctuations above the software thermal
management thresholds will cause temporary clock reductions. Power fluctuations in
the target workload should be evaluated for their potential to cause temperature to
fluctuate above the software threshold.
4.4 XAVIER SoC HARDWARE THERMAL
THROTTLING
If the software thermal management is not able to maintain the Xavier SoC temperature,
then the hardware thermal throttling will engage in an attempt to prevent an over-
Software Thermal Management
Jetson AGX Xavier TDG-08981-001_v1.0 | 19
temperature thermal trip. Thermal trips on Jetson AGX Xavier cause the system to reset.
To avoid thermal trip conditions without being overly conservative, Xavier SoC has
hardware-engaged clock throttling mechanisms that are used as a last resort to prevent
thermal trip conditions. This will lower the Xavier SoC temperature, but it will also
significantly reduce the overall Xavier SoC performance. The Xavier SoC throttle
settings cannot be altered. These settings are implemented by NVIDIA to meet product
safety and reliability standards.
4.5 XAVIER SoC THERMAL TRIP TEMPERATURE
The Xavier SoC is rated to operate at a junction temperature not-to-exceed 105 °C. Jetson
AGX Xavier has hardware thermal trip mechanisms that enforce this limit by
automatically performing a system reset when this temperature is exceeded.
The thermal trip temperature should not be reached at any time during normal
operation, but it may occur if cooling system components are broken, jammed, or
otherwise unable to cool the Xavier SoC under worst-case conditions. If a thermal trip
event is triggered, then a major fault in the Jetson AGX Xavier or system cooling solution
has occurred. Thermal trip can be initiated by any of the sensors listed in Table 2-1.
Using multiple sensors enables operation closer to the temperature limit without
compromising reliability by reducing the uncertainty associated with the hotspot
location.
The following thermal trip mechanisms have been implemented:
Internal sensor-based thermal trip - Failsafe thermal trip is guaranteed by using the
thermal trip signal directly from the SoC to the PMIC. After the failsafe thermal trip,
the system will reset without the user pressing the power button or equivalent input.
T.diode/temperature-monitor-based thermal trip - When the external temperature
monitor detects that the T.diode temperature is above a pre-programmed thermal
trip, the monitor's THERM output signals the PMIC to reset the system without any
software control. This is a back-up mechanism to the internal sensor-based thermal
trip, so it is intentionally margined to a higher temperature to avoid contention with
internal sensor-based thermal trip.
The Xavier SoC thermal trip settings cannot be altered. These settings are implemented
by NVIDIA to meet product safety and reliability standard.
Jetson AGX Xavier TDG-08981-001_v1.0| 20
Chapter 5.
OPTIMIZING JETSON AGX XAVIER FOR
POWER AND PERFORMANCE
5.1 POWER SUPPLY
The choice of voltage for the input power supply to the Jetson AGX Xavier has an
impact on the overall power efficiency. There are two input voltage rails for Jetson AGX
Xavier:
SYS_VIN_HV and SYS_VIN_MV. The input voltage for SYS_VIN_HV can range from
9V to 19V while
SYS_VIN_MV requires 5V. For optimal efficiency, a lower voltage power
supply should be used. For example, a standard 9V power supply provides better
efficiency over a 19V one. As the input voltage increases from 9V up to 19V the module
operating efficiency will drop off.
5.2 POWER MEASURMENT HARDWARE
The Jetson AGX Xavier module has 2 power monitors on board for measuring power
consumption of the total module power.
VDD_GPU, VDD_CPU, and VDD_SOC are
measured by one of the power monitors.
VDD_CV, VDDRQ, and SYS5V are measured by
the other power monitor.
Figure 5-1 shows the block diagram of the power supply and the rails that can be
measured with built-in power monitors. The built-in power monitor has a range up to 26
V, which makes it possible to measure all the ranges that are supported on Jetson AGX
Xavier. The location of the measurement points is shown in Figure 5-1. Note that the
SOC, CPU, GPU, CV, and DDR power rails are sampled BEFORE the voltage regulator,
so any measurements include the voltage regulator losses.
Optimizing Jetson AGX Xavier for Power and Performance
Jetson AGX Xavier TDG-08981-001_v1.0 | 21
HV
REGU L ATOR
REGU L ATOR
EX TER NA L
PO WER
SUPP LY
EX TER NA L
PO WER
SUPP LY
PMIC
DDR RAM
GPU
CPU
SOC
CV
XAVIER SOC
MV
VDD_GPU
VDD_CPU
VDD_SOC
VDD_CV
VDD_DDRQ
Figure 5-1. Jetson AGX Xavier Module Power Rails
Upon system power up, the 2 power monitors report voltage and current values of the 6
power rails by averaging the last 512 samples from the continuously probed data. Power
is calculated from these averaged samples (TBD).
The data is easily accessed by reading the corresponding sysfs nodes of the power
monitors. It provides the data for measuring voltage, current, and power without the
need for any additional instruments. The measurements reported by the power monitors
are accurate within 5% (TBD).
5.3 POWER MEASUREMENT SOFTWARE USAGE
The Jetson AGX Xavier module has 3-channel INA3221 monitors at I2C addresses 0x40
and 0x41. The sysfs nodes to read rail name, voltage, current, and power can be found
under the INA3221 driver’s directory:
/sys/bus/i2c/drivers/ina3221x
Among the listed addresses under the above sysfs directory, 0-0040 and 0-0041 are the
power monitors for supply rails on Jetson AGX Xavier module:
Optimizing Jetson AGX Xavier for Power and Performance
Jetson AGX Xavier TDG-08981-001_v1.0 | 22
The following data can be obtained from the Sysfs:
Rail Name: ../<address>/iio_device/rail_name_<Channel>
Current (mA): ../<address>/iio_device/in_current<Channel>_input
Voltage (mV): ../<address>/iio_device/in_voltage<Channel>_input
Power (mW): ../<address>/iio_device/in_power<Channel>_input
The address and channel allocations are given in Table 5-1.
Table 5-1. Address and Channel Allocation
Power Rail <Address> Channel Power Rail <Address> Channel
VDD_GPU 0-0040 0 VDD_CV 0-0041 0
VDD_CPU 0-0040 1 VDD_VDDRQ 0-0041 1
VDD_SOC 0-0040 2 VDD_SYS5V 0-0041 2
Use the CAT commands to display each power rail’s name along with voltage, current,
and power consumption.
To display the name of the GPU rail:
$ cat /sys/bus/i2c/devices/1-0040/iio_device/rail_name_0
GPU
To display the current (in mA) of GPU rail:
$ cat /sys/bus/i2c/devices/1-0040/iio_device/in_current0_input
24
To display the voltage (in mV) of GPU rail:
$ cat /sys/bus/i2c/drivers/ina3221x/0-0040/iio_device/in_voltage0_input
19520
To display the power (in mW) of GPU rail:
$ cat /sys/bus/i2c/drivers/ina3221x/0-0040/iio_device/in_power0_input
468
Note that reading internal nodes utilizes internal CPU resources. Thus, accessing the
nodes too frequently will incur excessive amount of power consumption due to this
reading task.
It is recommended to set the sample interval to 1 second or longer.
Since the power consumption of the system can change with temperature, it is also
recommended that the power measurements be performed after the system has warmed
up to a steady state and is running the application at target ambient temperature.
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